Qualcomm Collaborates With Google To Develop RISC-V-Based Chips For Wear OS


 Google and Qualcomm today announced a strategic collaboration, where the two technology giants will now develop a chipset for wearable devices, based on the RISC-V architecture.



RISC-V (called Risk 5) or Reduced Instruction Set Computer V is an open source instruction set developed based on existing RISC standards for developing processing chips. RISC-V is seen as having potential in terms of development because it is based on open source and can be developed according to specifications and requirements.


A number of companies have already expressed support for this RISC-V technology, including local companies and universities such as USM.


With the development of this RISC-V Snapdragon Wear chip, it is expected to provide more freedom in the development and customization of the processing core as needed.


For now, it is not yet known when we will see this RISC-V based product by Qualcomm.

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